DAC clock invert
| ENABLE | DAC module enable |
| SIN_EN | Sin wave enable |
| MOD_EN | Modulator enable |
| MOD_WD | Modulator output width |
| SMPL_RATE | sigma delta modulator down sample rate |
| SGN_INV | Sign bit inverse |
| BUF_IN_ALGN | FIFO input data align |
| BUF_OUT_ALGN | FIFO output data and Sine wave generator output align mode when no modulation mode |
| TRG_MODE | Trigger mode |
| TRG_EDGE | Trigger edge select |
| TRG_SEL | Trigger select |
| CLK_DIV | DAC clock divider |
| CLK_INV | DAC clock invert |